ICETSST-2018 - Part 1
Research Article |
Design and Implementation of Full Adders using QCA
V.Subashini , R.S. Koteeshwari
Research Article |
Design and Application of Approximate Circuit by SAIF Pruning
K.Mahalakshmi S.Chitra M.E
Research Article |
Probability-Driven Timing Error Based Multibit Flip-Flop with Clock Gating
B.Rajeshwari M.AntonyJegan M.E
Research Article |
VLSI Implementation of Dead Pixel Removal using Three Cell Sorting Median Filter
Murugan.G , Mrs.K.Theivajeyaselvi ME