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Research Article | Open Access
Volume 1 | Issue 3 | Year 2014 | Article Id. IJECE-V1I3P101 | DOI : https://doi.org/10.14445/23488549/IJECE-V1I3P101

Power Consumption of CIC Decimation Filter with Sharpened Zero Rotation using VLSI Technique

R.Mononisha and G.Brindha

Citation :

R.Mononisha and G.Brindha, "Power Consumption of CIC Decimation Filter with Sharpened Zero Rotation using VLSI Technique," International Journal of Electronics and Communication Engineering, vol. 1, no. 3, pp. 1-5, 2014. Crossref, https://doi.org/10.14445/23488549/IJECE-V1I3P101

Abstract

The CIC decimation filter with zero rotation and compensation section was developed and presented in this paper. The magnitude response of the filter with various decimation factors considering different stages were estimated and compared with the existing structures. The sine compensator was used to improve the passband droop and stopband alias rejection. The result showed that the passband droop improvement of 36%, 88%, 89% and stopband improvement of 6%, 7.2%, 2% for the decimation factor 8, 16 and 32 respectively.

Keywords

CIC filter, Comb filter, Filter sharpening, Zero rotation, Decimator, Compensation filter

References

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